Overview of the estimation error algorithm of the

2022-07-27
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Overview of single-chip microcomputer estimation error algorithm

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estimation error algorithm is an algorithm that intelligently uses chip J to judge the signal frequency on FSK signal decoding. It runs in 16 bit single-chip microcomputer and has the disadvantages of complex algorithm and the most human calculation. In this paper, an improved algorithm is proposed, which uses the corresponding relationship between the two sampling points before and after the intelligent FSK signal. By eliminating the similar term, the estimation error algorithm is simpler. It is proved that the calculation of the improved algorithm is the most artificially reduced by the experiment of the precision collection machine tester. Thus, the occupation of CPU resources by the algorithm is reduced, leaving room for the expansion of other intelligent functions

intelligence is the use of IT technology to add a computer chip to a traditional computer and become a new intelligent information terminal. Although a 4-bit or 8-bit single chip microcomputer has a relatively good control function, it runs slowly and has poor computing power. For example, there is no multi byte multiplication and division method, and a slightly more complex algorithm is difficult to realize. The entire complex control process can only be completed with the help of the data processing capacity of a professional codec chip. Therefore, the early intelligence realized digital signal communication and internal intelligent management through a system composed of a special codec chip and a 4-bit or 8-bit single chip microcomputer. At the end of the 1990s, the fourth generation l 6-bit single chip microcomputer, such as spt6608a of Taiwan Sunplus company, has fast operation speed. The addition instruction can be completed within 1 microsecond. The built-in voice and coding generator has low voltage and power consumption, and allows users to adopt a professional language for industrial control. Taking the fourth generation single-chip microcomputer as the core - TL system, all functions are realized by running the developed software system, so that the hardware cost of intelligent products is enough to see that the pressure testing machine is widely used and the development cost is greatly reduced. However, the fourth generation single chip microcomputer can not directly carry out floating-point calculation without a coprocessor, and it still has the defect of insufficient computing power. Therefore, the decoding algorithm should not only be as simple and efficient as possible, but also have a certain anti-interference ability to avoid random noise mistranslation and overlapping of adjacent number data; It is not only necessary to complete the decoding within the allowed time, but also to minimize the use of CPU resources, so as to leave it to other functional modules of the single chip microcomputer system

at present, intelligent FSK signal decoding algorithms mainly include zero crossing detection algorithm, software filter algorithm, estimation error algorithm, etc. The zero crossing detection algorithm is simple, but the anti-interference ability is poor; The software filter algorithm is simple, but it is not universal in the target hardware environment; The estimation error algorithm is simple and has certain anti-interference ability, but its calculation amount is still larger than the whole industrial chain layout of terminal products such as lithium-ion power batteries and lithium-ion electric vehicles compared with the L6 bit single chip microcomputer with weak calculation ability. Therefore, this paper proposes an improved algorithm

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